FIG. 8 is a circuit diagram showing a basic configuration of a conventional discharge lamp ballast apparatus. In FIG. 8, the discharge lamp ballast apparatus 100 includes a DC/DC converter 102 for boosting the DC voltage of a DC power source 101, a DC/AC inverter 103 for converting the output voltage of the DC/DC converter 102 to a rectangular wave alternating current, an igniter 104 for starting discharge of an HID bulb (discharge lamp or high-intensity discharge lamp) 105, and a control unit 106 for controlling the DC/DC converter 102 and the DC/AC inverter 103.
The DC/DC converter 102 includes a flyback transformer 107, a switching device 108 consisting of a MOS field-effect transistor, a rectifying diode 109 and a smoothing capacitor 110. The DC/DC converter 102 applies the DC voltage of the DC power source 101 to the flyback transformer 107 by turning on the switching device 108 with the control unit 106, stores the magnetic energy in the flyback transformer 107, and generates the DC voltage by rectifying with the rectifying diode 109 the voltage generated in the flyback transformer 107 by releasing the magnetic energy stored in the flyback transformer 107 by turning off the switching device 108 with the control unit 106.
The DC/AC inverter 103 includes switching devices Q1-Q4 using MOS field-effect transistors or IGBTs, and an inverter driver. In FIG. 8, the switching devices Q1-Q4 are connected in an H fashion to constitute an H-bridge inverter. In this configuration, the switching devices Q1 and Q3 output high potential, and the switching devices Q2 and Q4 output low potential. Such an H-bridge inverter circuit is disclosed in Patent Document 1, for example.
In addition, the inverter driver employs a bootstrap circuit as an arrangement for driving the high-side switching device Q1 (Q3). The circuit has a resistor 111a and a capacitor C1 (or a resistor 111b and a capacitor C2) connected in series across the gate and source of the high-side switching device Q1 (Q3), a diode 113a (or 113b) for charging the capacitor C1 (C2) with the DC power source 101, and a driving transistor 112a (or 112b) having its collector connected to the gate of the switching device Q1 (Q3).
The driving transistors 112a and 112b consist of an NPN-type bipolar transistor, for example, and have their emitters grounded. In addition, the driving transistor 112a has its base connected to the control unit 106, and the driving transistor 112b has its base connected to the control unit 106 via a NOT circuit 114. Likewise, the low-side switching device Q2 has its gate connected to the control unit 106, and the switching device Q4 has its gate connected to the control unit 106 via the NOT circuit 114.
When the high-side switching device Q1 (Q3) is in the off state and the low-side switching device Q2 (Q4) connected in series to the switching device Q1 (Q3) is in the on state, the capacitor C1 (C2) is charged. When high-side switching device Q1 (Q3) changes to the on state, the charge stored in the capacitor C1 (C2) pulls up the gate voltage to a potential higher than the source terminal of the high-side switching device Q1 (Q3) by a value corresponding to the charge stored in the capacitor C1 (C2). This enables the gate voltage to hold its value because of the current flowing in the direction of the arrow X in FIG. 8, thereby being able to maintain the on state of the switching device Q1 (Q3). The DC/AC inverter 103 employing such a bootstrap circuit is disclosed in Patent Document 2, for example.
To start lighting of the HID bulb 105, the DC/AC inverter 103 keeps the on state of the high-side switching device and the low-side switching device paired in the H bridge in response to the control signal from the control unit 106, and keeps the off state of the high-side switching device and the low-side switching device opposite to them, thereby supplying a prescribed DC voltage to the HID bulb 105.
The igniter 104 superposes a high voltage pulse (igniter pulse) it generates upon the DC voltage and applies to the HID bulb 105. Thus, the HID bulb 105 brings about breakdown between its electrodes and starts the discharge. After applying the igniter pulse and starting the discharge, the DC/AC inverter 103 keeps the on state of the high-side switching device and the low-side switching device paired in the H bridge and the off state of the high-side switching device and the low-side switching device opposite to them until the discharge phenomenon of the HID bulb 105 becomes stable, and continues outputting the DC voltage.
Once the discharge has been stabilized, the DC/AC inverter 103 turns on and off the switching devices Q1 and Q4 and the switching devices Q2 and Q3 paired in the H bridge alternatively at a fixed repeat frequency (about 400 hertz, for example). Thus, the polarity of the DC voltage fed from the DC/DC converter 102 is reversed alternately to generate the rectangular wave alternating current. The rectangular wave alternating current is supplied to the HID bulb 105 via the igniter 104.
In addition, as a conventional inverter driver that reduces the current consumption of the capacitors C1 and C2 of the bootstrap DC/AC inverter described above, there is one employing an RS flip-flop (referred to as “F/F” from now on) (see Patent Document 3, for example). Incidentally, as an inverter driver IC using such an F/F, IR2110 of IR (International Rectifier) Corporation or the like is known.
FIG. 9 is a circuit diagram showing a basic configuration of a major portion of an inverter driver using the F/F, which replaces the circuit section C in FIG. 8 for driving the high-side switching device Q1 (the switching device Q3 side is the same). In FIG. 9, the control signal from the control unit 106 is supplied to a pulse generator 117, and to a pulse generator 119 via a NOT circuit 118.
A level shift circuit 116 includes a transistor 120 for shifting the level of the pulse signal supplied from the generator 117 and a transistor 121 for shifting the level of the pulse signal supplied from pulse generator 119. The transistors 120 and 121 have their emitters grounded via resistors 122 and 123 and their collectors supplied with the charge stored in the capacitor C1 via resistors 124 and 125.
The F/F 115 has its output terminal Q connected to the gate of the high-side switching device Q1, its set terminal S connected to the set signal output of the level shift circuit 116 via a NOT circuit 126, and its reset terminal R connected to the reset signal output of the level shift circuit 116 via a NOT circuit 127.
The pulse generator 117 generates a pulse signal rising to a high level in synchronization with the rising edge of the control signal from the control unit 106, and supplies it to the transistor 120. During the high level of the pulse signal, the transistor 120 maintains itself at the on state and its collector potential at the low level, and keeps the input to the NOT circuit 126 at the low level and the output of the NOT circuit 126 at the high level.
Thus, being placed at the high level during a short time in synchronization with the rising edge of the control signal, the pulse current flows through the level shift circuit 116 on the side of the set terminal S, thereby setting the set terminal S of the F/F 115 at the high level. This will raise the output Q of the F/F 115 to the high level, and turns on the switching device Q1.
In short, the output Q of the F/F 115 rises to the high level in synchronization with the rising edge of the control signal and turns on the switching device Q1.
Incidentally, the pulse generators 117 and 119 are one-shot multivibrators for generating the pulse signals for a short time in synchronization with the rising edge the input signal.
On the other hand, the pulse generator 119, receiving the control signal from the control unit 106 via the NOT circuit 118, generates a pulse signal in synchronization with the rising edge of the signal, and supplies it to the transistor 121. During the high level of the pulse signal, the transistor 121 brings itself to the on state and its collector potential to the low level. Thus, the input to the NOT circuit 127 changes to the low level and the output of the NOT circuit 127 changes to the high level.
Accordingly, during a short time the pulse signal is placed at the high level, the pulse current flows through the level shift circuit 116 on side of the reset terminal R, thereby changing the potential at the reset terminal R of the F/F 115 to the high level. This will change the output Q of the F/F 115 to the low level, and turn off the switching device Q1.
In short, the output Q of the F/F 115 changes to the low level in synchronization with the falling edge of the control signal and turns off the switching device Q1.
In addition, the low-side switching device Q2 receives a rectangular wave resulting from inverting the control signal from the control unit 106 with the NOT circuit 128. This will cause the low-side switching device Q2 to perform operation opposite to that of the high-side switching device Q1, that is, it is in the off state while the switching device Q1 is in the on state.
Incidentally, the capacitor C1 is charged with the DC voltage of the DC power source 101 when the high-side switching device Q1 is in the off state and the low-side switching device Q2 connected to the low potential side of the switching device Q1 is in the on state.
In this manner, in the circuit shown in FIG. 9, a circuit current flows through the level shift circuit 116 only when the switching device Q1 (Q3) switches between its on and off states, and during the interval between them, the F/F 115 holds its output level. Thus, it can reduce the current consumption required for driving the high-side switching devices Q1 and Q3, thereby being able to simplify the circuit configuration around the power source of the DC/AC inverter 103.